Oleksandr Kuzmenko, EditorPublished 6 min readAI-assisted · editor-reviewed
TL;DR
- Fable 5.2 scored 83.5% on BenchCAD 2.1 and 69% on Diode PCB Gym, doubling previous frontier model benchmarks.
- The model actively self-corrects tangled multi-layer tracks by swapping interchangeable microcontroller pins and rerouting crowded sectors.
- When standard KiCad routing tools proved slow, Claude generated a standalone grid search routing algorithm within 30 minutes.
Key facts
- BenchCAD 2.1 Score
- 83.5% (self-reported)
- Diode PCB Gym Score
- 69% (self-reported)
- Fable 5.1 BenchCAD Score
- 44.4% (self-reported)
- Custom Router Performance
- ~1 second per long track
Source: Key facts — BenchCAD 2.1 Score, Diode PCB Gym Score, Fable 5.1 BenchCAD Score
Source: Key facts. BenchCAD 2.1 Score: 83.5% (self-reported). Diode PCB Gym Score: 69% (self-reported). Fable 5.1 BenchCAD Score: 44.4% (self-reported). The chart compares only values that share a unit. Each figure is copied from the story.
Metric chart
- 83.5% (self-reported)BenchCAD 2.1 Score
- 69% (self-reported)Diode PCB Gym Score
- 44.4% (self-reported)Fable 5.1 BenchCAD Score
- BenchCAD 2.1 Score83.5% (self-reported)
- Diode PCB Gym Score69% (self-reported)
- Fable 5.1 BenchCAD Score44.4% (self-reported)
Geometric Reasoning and Self-Correction
Prior models struggled to position passive decoupling capacitors near their corresponding active IC pins. Fable 5.2 demonstrated proactive spatial planning: when routing a four-layer speakerphone board, it swapped interchangeable pin assignments between chips to maintain touch-sensor lines on a single copper layer without unnecessary interlayer vias. When copper traces became visually and logically congested, the model autonomously ripped up the routing and restarted with cleaner geometric paths.
Writing Custom Routing Algorithms in KiCad
Rather than relying exclusively on built-in CAD tooling, Fable 5.2 adapted its toolchain:
- Automated Pin Reallocation: Claude swapped pin functions on multi-purpose microcontrollers to prevent trace cross-overs.
- Custom Grid Search Router: Confronted with routing 100 pins across dense board real estate, Claude authored a custom routing script in 30 minutes that solved long paths in roughly one second per track.
- High-Speed Signal Integrity: The model factored in differential impedance requirements, keeping USB and Ethernet trace pairs equidistant while inserting zigzag tuning patterns to synchronize propagation delay.
Benchmark Validation: BenchCAD and PCB Gym
Fable 5.2 achieved 83.5% on BenchCAD 2.1, substantially higher than Fable 5.1 (44.4%) and Opus 5.5 (65.3%). On Diode's PCB Gym benchmark—which strips existing routing from production boards to measure automated layout reconstruction—Fable 5.2 scored 69%, demonstrating that agentic models can synthesize manufacturable hardware prototypes directly from component datasheets.
Try it in 2 minutes
# Conceptual script pattern for agentic KiCad track synthesis
import pcbnew
def route_differential_tracks(board, net_a_name, net_b_name, spacing_mm=0.2):
net_a = board.FindNet(net_a_name)
net_b = board.FindNet(net_b_name)
# Agents execute geometric routing loops via Python bindings
print(f"Routing matched pairs for {net_a.GetNetname()} and {net_b.GetNetname()}")When to use
- Use when designing dense multi-layer prototypes requiring multi-pin breakout, high-speed trace length matching, and firmware scaffolding.
- Use when prototyping custom electronic accessories where rapid datasheet consumption and iterative pin swapping save days of manual CAD design.
When NOT to use
- Do not bypass human engineering review for safety-critical hardware, mains-voltage boards, or devices requiring stringent commercial EMC certification.
- Avoid using LLM layout generation for simple single-layer breakout boards where standard autorouters finish in milliseconds.
What to do today
- Feed component datasheets and pinouts directly into agent contexts when designing embedded electronics.
- Allow your agent access to scripting interfaces in KiCad rather than forcing purely GUI-level automation.
- Include length-matching and differential pair constraints explicitly in system prompts for high-speed buses.
Step names are taken from What to do today.
Step names are taken from What to do today. Feed component datasheets and pinouts directly into agent contexts when designing embedded electronics.. Allow your agent access to scripting interfaces in KiCad rather than forcing purely GUI-level automation.. Include length-matching and differential pair constraints explicitly in system prompts for high-speed buses.
- Feed component datasheets and pinouts directly into agent contexts when designing embedded electronics.
- Allow your agent access to scripting interfaces in KiCad rather than forcing purely GUI-level automation.
- Include length-matching and differential pair constraints explicitly in system prompts for high-speed buses.